Peking University realizes the development of carbon nanotube electronics by implementing gigahertz carbon nanotube integrated circuits

    IC chips have long followed Moore's Law, with continuous reductions in transistor size leading to improved performance, higher integration, and lower costs. However, further advancements are now constrained by physical limits, power consumption, and rising manufacturing costs, which necessitate the development of new information technologies to support future electronics. Among the promising candidates, carbon nanotubes (CNTs) are considered ideal for building sub-10 nm transistors. Both theoretical and experimental studies show that CNT-based devices can offer 5 to 10 times better intrinsic speed and power efficiency compared to silicon-based counterparts, with performance approaching quantum limits. Despite this potential, practical CNT integrated circuits face challenges, such as significant parasitic effects, which result in much lower operating frequencies—often below 1 MHz—compared to silicon CMOS circuits, which typically operate at gigahertz speeds. In 2017, IBM researchers published a study on a CNT-based ring oscillator, achieving an oscillation frequency of 282 MHz, still far from expectations. This highlighted the urgent need to boost the operational frequency of CNT-based integrated circuits. Over the past decade, Professor Zhang Zhiyong and Professor Peng Lingmao from Peking University’s Key Laboratory of Nanodevice Physics and Chemistry have dedicated their research to advancing CNT electronics. They have developed a full set of CNT CMOS technology, achieving early-stage sub-10 nm CMOS devices and medium-scale integrated circuits. Recently, through material optimization, device structure refinement, and circuit layout improvements, they achieved the world’s first gigahertz-frequency CNT integrated circuit. Their work significantly advanced the field of CNT electronics. By optimizing CNT materials and device structures, they enhanced the transconductance and drive current of CNT transistors. At a gate length of 120 nm, the on-state current reached 0.55 mA/μm and transconductance reached 0.46 mS/μm under a 0.8 V bias—setting a new record for CNT devices. Using these high-performance transistors, they built a five-stage ring oscillator that operated at 680 MHz. Further optimizations included introducing air sidewalls between the source/drain and gate to reduce parasitic capacitance and increasing the gate resistor thickness to minimize parasitic resistance. These changes pushed the oscillation frequency up to 2.62 GHz. Then, by reducing the gate length and optimizing the circuit layout, they achieved a 5.54 GHz oscillation frequency—a 20-fold improvement over the previous record of 282 MHz. The single-stage gate delay of a 120 nm CNT device was only 18 ps, comparable to commercial silicon CMOS circuits at the same node without multi-layer interconnection technology. Additionally, the carbon nanotube film used as the active region enabled mass production of high-performance CNT ring oscillators with a 60% yield. The average oscillation frequency was 2.62 GHz, with a deviation of just 0.16 GHz, indicating excellent uniformity. This groundbreaking research was published online in *Nature Electronics* on December 11, 2017, titled “Gigahertz Integrated Circuits Based on Carbon Nanotube Films.” It marks the first paper from Peking University in the journal. Zhong Donglai, a Ph.D. student, was the first author, with Professors Zhang Zhiyong and Peng Lingmao as co-authors. This work not only advances CNT integrated circuits but also demonstrates that, with existing materials and simplified processes, CNT-based circuits can match the performance of silicon CMOS. With high-density CNT arrays and more advanced fabrication techniques, CNT technology could potentially surpass silicon in both speed and power efficiency. The research was supported by several key national programs, including the National Key R&D Program, the National Natural Science Foundation, and the Beijing Science and Technology Plan.

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